/*
 * Copyright (C) 2014-2015 Spreadtrum Communications Inc.
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 */

#ifndef __ASM_ARCH_HARDWARE_SC9630_H
#define __ASM_ARCH_HARDWARE_SC9630_H

#define SPRD_CORESIGHT_PHYS	0x10000000
#define SPRD_CORE_PHYS			0x12000000
#define SPRD_DMA0_PHYS		0X20100000
#define SPRD_USB_PHYS			0X20200000
#define SPRD_SDIO0_PHYS		0X20300000
#define SPRD_SDIO1_PHYS		0X20400000
#define SPRD_SDIO2_PHYS		0X20500000
#define SPRD_EMMC_PHYS		0X20600000
#define SPRD_DRM_PHYS			0X20700000
#define SPRD_LCDC_PHYS			0X20800000
#define SPRD_GSP_PHYS			0X20A00000
#define SPRD_GSPMMU_PHYS		0X20B00000
#define SPRD_NFC_PHYS			0X20C00000
#define SPRD_HWLOCK0_PHYS		0X20D00000
#define SPRD_AHB_PHYS			0X20E00000
#define SPRD_BM0_PHYS			0X20F00000
#define SPRD_BM1_PHYS			0X21000000
#define SPRD_BM2_PHYS			0X21100000
#define SPRD_ZIPENC_PHYS		0X21200000
#define SPRD_ZIPDEC_PHYS		0X21300000
#define SPRD_USB_HSIC_PHYS	0X21400000
#define SPRD_APBCKG_PHYS		0X21500000
#define SPRD_DISPC0_PHYS		0X20800000
#define SPRD_DSI_PHYS			0X21800000
#define SPRD_LPDDR2_PHYS		0X30000000
#define SPRD_LPDDR2_PHY_PHYS	0X30010000
#define SPRD_PUB_PHYS			0X30020000
#define SPRD_AXIBM0_PHYS		0X30040000
#define SPRD_AXIBM1_PHYS		0X30050000
#define SPRD_AXIBM2_PHYS		0X30060000
#define SPRD_AXIBM3_PHYS		0X30070000
#define SPRD_AXIBM4_PHYS		0X30080000
#define SPRD_AXIBM5_PHYS		0X30090000
#define SPRD_AXIBM6_PHYS		0X300A0000
#define SPRD_AXIBM7_PHYS		0X300B0000
#define SPRD_AXIBM8_PHYS		0X300C0000
#define SPRD_AUDIO_PHYS		0X40000000
#define SPRD_AUDIO_IF_PHYS		0X40010000
#define SPRD_VBC_PHYS			0X40020000
#define SPRD_ADI_PHYS			0X40030000
#define SPRD_ADISLAVE_PHYS		0X40038000
#define SPRD_SYSTIMER_CMP_PHYS		0X40040000
#define SPRD_GPTIMER0_PHYS		0X40050000
#define SPRD_HWLOCK1_PHYS		0X40060000
#define SPRD_MDAR_PHYS		0X40070000
#define SPRD_I2C_PHYS			0X40080000
#define SPRD_INT_PHYS			0X40200000
#define SPRD_EIC_PHYS			0X40210000
#define SPRD_APTIMER0_PHYS	0X40220000
#define SPRD_SYSCNT_PHYS		0X40230000
#define SPRD_UIDEFUSE_PHYS		0X40240000
#define SPRD_KPD_PHYS			0X40250000
#define SPRD_PWM_PHYS			0X40260000
#define SPRD_FM_PHYS			0X40270000
#define SPRD_GPIO_PHYS			0X40280000
#define SPRD_WDG_PHYS			0X40290000
#define SPRD_PIN_PHYS			0X402A0000
#define SPRD_PMU_PHYS			0X402B0000
#define SPRD_IPI_PHYS			0X402C0000
#define SPRD_AONCKG_PHYS		0X402D0000
#define SPRD_AONAPB_PHYS		0X402E0000
#define SPRD_THM_PHYS			0X402F0000
#define SPRD_AVSCA7_PHYS		0X40300000
#define SPRD_CA7WDG_PHYS		0X40310000
#define SPRD_APTIMER1_PHYS	0X40320000
#define SPRD_APTIMER2_PHYS	0X40330000
#define SPRD_CA7TS0_PHYS		0X40400000
#define SPRD_CA7TS1_PHYS		0X40410000
#define SPRD_MALI_PHYS			0X60000000
#define SPRD_GPUAPB_PHYS		0X60100000
#define SPRD_GPUCKG_PHYS		0X60200000
#define SPRD_DCAM_PHYS		0X60800000
#define SPRD_VSP_PHYS			0X60900000
#define SPRD_ISP_PHYS			0X60A00000
#define SPRD_JPG_PHYS			0X60B00000
#define SPRD_CSI2_PHYS			0X60C00000
#define SPRD_MMAHB_PHYS		0X60D00000
#define SPRD_MMCKG_PHYS		0X60E00000
#define SPRD_UART0_PHYS		0X70000000
#define SPRD_UART1_PHYS		0X70100000
#define SPRD_UART2_PHYS		0X70200000
#define SPRD_UART3_PHYS		0X70300000
#define SPRD_UART4_PHYS		0X70400000
#define SPRD_I2C0_PHYS			0X70500000
#define SPRD_I2C1_PHYS			0X70600000
#define SPRD_I2C2_PHYS			0X70700000
#define SPRD_I2C3_PHYS			0X70800000
#define SPRD_I2C4_PHYS			0X70900000
#define SPRD_SPI0_PHYS			0X70A00000
#define SPRD_SPI1_PHYS			0X70B00000
#define SPRD_SPI2_PHYS			0X70C00000
#define SPRD_IIS0_PHYS			0X70D00000
#define SPRD_IIS1_PHYS			0X70E00000
#define SPRD_IIS2_PHYS			0X70F00000
#define SPRD_IIS3_PHYS			0X71000000
#define SPRD_SIM0_PHYS			0X71100000
#define SPRD_APBREG_PHYS		0X71300000
#define SPRD_INTC0_PHYS		0X71400000
#define SPRD_INTC1_PHYS		0X71500000
#define SPRD_INTC2_PHYS		0X71600000
#define SPRD_INTC3_PHYS		0X71700000
#define SPRD_IRAM0_PHYS		0X0
#define SPRD_IRAM0H_PHYS		0X1000
#define SPRD_IRAM1_PHYS		0X50000000


#define SPRD_DISPC0_BASE		SPRD_DISPC0_PHYS
#define CTL_BASE_PWM			SPRD_PWM_PHYS
#define SPRD_GPTIMER0_BASE	SPRD_GPTIMER0_PHYS
#define SPRD_DSI_BASE			SPRD_DSI_PHYS
#define SPRD_USB_BASE			SPRD_USB_PHYS

/* registers for watchdog ,RTC, touch panel, aux adc, analog die... */
#define SPRD_MISC_BASE	((unsigned int)SPRD_ADI_BASE)
#define SPRD_MISC_PHYS			((unsigned int)SPRD_ADI_PHYS)

#ifndef REGS_AHB_BASE
#define REGS_AHB_BASE			( SPRD_AHB_PHYS+ 0x200)
#endif

/* FIXME: jianjun.he */
#define SPRD_IRAM_PHYS		SPRD_IRAM0_PHYS + 0x1000
#define SPRD_IRAM_SIZE		SZ_4K
#define SPRD_GREG_PHYS		SPRD_AONAPB_PHYS
#define SPRD_GREG_SIZE		SZ_64K


#ifndef REGS_GLB_BASE
#define REGS_GLB_BASE			( SPRD_GREG_BASE )
#endif

#define CHIP_ID_LOW_REG		(SPRD_AHB_PHYS+ 0xfc)

//#define REG_GLB_GEN0 		SPRD_AONAPB_BASE
#define SPRD_EFUSE_BASE		SPRD_UIDEFUSE_PHYS

#define REGS_AP_AHB_BASE	SPRD_AHB_PHYS
#define REGS_AP_APB_BASE	SPRD_APBREG_PHYS
#define REGS_AON_APB_BASE	SPRD_AONAPB_PHYS
#define REGS_GPU_APB_BASE	SPRD_GPUAPB_PHYS
#define REGS_MM_AHB_BASE	SPRD_MMAHB_PHYS
#define REGS_PMU_APB_BASE	SPRD_PMU_PHYS
#define REGS_AON_CLK_BASE	SPRD_AONCKG_PHYS
#define REGS_AP_CLK_BASE	SPRD_APBCKG_PHYS
#define REGS_GPU_CLK_BASE	SPRD_GPUCKG_PHYS
#define REGS_MM_CLK_BASE	SPRD_MMCKG_PHYS
#define REGS_PUB_APB_BASE	SPRD_PUB_PHYS

#define SIPC_SMEM_ADDR 		(CONFIG_PHYS_OFFSET + 120 * SZ_1M)

#define CPT_START_ADDR		(CONFIG_PHYS_OFFSET + 128 * SZ_1M)
#define CPT_TOTAL_SIZE		(SZ_1M * 18)
#define CPT_RING_ADDR		(CPT_START_ADDR + CPT_TOTAL_SIZE - SZ_4K)
#define CPT_RING_SIZE		(SZ_4K)
#define CPT_SMEM_SIZE		(SZ_1M * 2)
#define CPW_START_ADDR		(CONFIG_PHYS_OFFSET + 256 * SZ_1M)
#define CPW_TOTAL_SIZE		(SZ_1M * 33)
#define CPW_RING_ADDR		(CPW_START_ADDR + CPW_TOTAL_SIZE - SZ_4K)
#define CPW_RING_SIZE			(SZ_4K)
#define CPW_SMEM_SIZE		(SZ_1M * 2)
#define WCN_START_ADDR		(CONFIG_PHYS_OFFSET + 320 * SZ_1M)
#define WCN_TOTAL_SIZE		(SZ_1M * 5)
#define WCN_RING_ADDR		(WCN_START_ADDR + WCN_TOTAL_SIZE - SZ_4K)
#define WCN_RING_SIZE			(SZ_4K)
#define WCN_SMEM_SIZE		(SZ_1M * 2)
#endif
